The influence of anisotropy in wide-bandgap 4H-SiC on the thyristor breakdown voltage and its junction termination extension design
Publication date
2024-09-16
Document type
Konferenzposter
Author
Organisational unit
Conference
European Materials Research Society Conference (E-MRS) 2024 ; Warsaw, Poland ; September 16-19, 2024
Peer-reviewed
✅
Part of the university bibliography
✅
Language
English
Abstract
The progress that has been made over the last few years in the production of high quality SiC wafers with a limited number of defects is making the fabrication of large area thyristors even more accessible. Due to the improved process gain of epitaxial growth, much thicker layers can now be grown, which enables higher thyristor blocking voltage. Due to the dimensions of the device, which reach up to several
hundred micrometers in the direction perpendicular to the c-plane, the anisotropy of the material has a significant impact on the characteristics of the device. The aim of this work is to optimize the thyristor blocking characteristics in an effort to step forward to next-generation thyristor devices with a blocking capability of up to 10 kV and beyond. Edge terminations are critical to the electric field distribution not only in the device periphery but also at its planar junctions and, thus, affect the blocking and avalanche behavior, respectively, in a particular way. For the ease of device processing, we have focused on single-step/multi-step junction termination extension (JTE) designs having the advantage to be realized using standard etching protocols. This way, we have avoided any complex termination architectures such as field guard rings which have been widely used in SiC commercial devices but require either very precise photolithography and mask etching resolution or costly high-energy implantation steps. The simulations were carried out using Synopsys’ TCAD Sentaurus environment. One of the most relevant 4H-SiC models used in breakdown voltage simulations is built on the impact ionization process in relation with electric field dependent ionization coefficients. In order to make detailed reference to the large anisotropy
demonstrated for the electron impact coefficient, we employed not only the ordinary isotropic approach but simulated also the crystal-oriented anisotropic part. The results presented in this contribution demonstrate simulation results obtained depending on the number of steps and the isotropic and anisotropic approach for a structure with a drift thickness of 100 μm. Regarding a 1-step JTE a maximum Vbr of
11.5 kV is reached in both cases. This corresponds to 72% (isotropic approach) and 66% (anisotropic approach) of the theoretical value. For 3-step JTE, a maximum Vbr of 12.9 kV (isotropic approach) and Vbr of 15.1 kV (anisotropic approach) was reached which corresponds to 81% and 86% of the theoretical value respectively. This clearly signals the need of using of a crystal-oriented approach, particularly when considering high-voltage bipolar devices such as thyristors with large drift-layer thickness. Moreover, it shows that in combination with JTE design anisotropy plays an important role how electric field crowding at/around the active device area is mitigated.
hundred micrometers in the direction perpendicular to the c-plane, the anisotropy of the material has a significant impact on the characteristics of the device. The aim of this work is to optimize the thyristor blocking characteristics in an effort to step forward to next-generation thyristor devices with a blocking capability of up to 10 kV and beyond. Edge terminations are critical to the electric field distribution not only in the device periphery but also at its planar junctions and, thus, affect the blocking and avalanche behavior, respectively, in a particular way. For the ease of device processing, we have focused on single-step/multi-step junction termination extension (JTE) designs having the advantage to be realized using standard etching protocols. This way, we have avoided any complex termination architectures such as field guard rings which have been widely used in SiC commercial devices but require either very precise photolithography and mask etching resolution or costly high-energy implantation steps. The simulations were carried out using Synopsys’ TCAD Sentaurus environment. One of the most relevant 4H-SiC models used in breakdown voltage simulations is built on the impact ionization process in relation with electric field dependent ionization coefficients. In order to make detailed reference to the large anisotropy
demonstrated for the electron impact coefficient, we employed not only the ordinary isotropic approach but simulated also the crystal-oriented anisotropic part. The results presented in this contribution demonstrate simulation results obtained depending on the number of steps and the isotropic and anisotropic approach for a structure with a drift thickness of 100 μm. Regarding a 1-step JTE a maximum Vbr of
11.5 kV is reached in both cases. This corresponds to 72% (isotropic approach) and 66% (anisotropic approach) of the theoretical value. For 3-step JTE, a maximum Vbr of 12.9 kV (isotropic approach) and Vbr of 15.1 kV (anisotropic approach) was reached which corresponds to 81% and 86% of the theoretical value respectively. This clearly signals the need of using of a crystal-oriented approach, particularly when considering high-voltage bipolar devices such as thyristors with large drift-layer thickness. Moreover, it shows that in combination with JTE design anisotropy plays an important role how electric field crowding at/around the active device area is mitigated.
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