Computational insights into solving optimization instance sets with MIP solvers on multi-core hardware

DOI
URI
Conference
24th Conference of the International Federation of Operational Research Societies (IFORS 2026) ; Vienna, Austria ; July 12–17, 2026
Project
Publisher
Universitätsbibliothek der HSU/UniBw H
Part of the university bibliography
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File(s)
Language
English
DDC Class
004 Informatik
Keyword
dtec.bw
hpc.bw
High performance computing
Mixed-integer programming
Oversubscription
Co-scheduling
Energy efficiency
Performance analysis
Abstract
High-performance computing systems offer ever-increasing core counts, yet most mixed-integer programming (MIP) solvers still rely on limited shared-memory parallelism with only modest speedups beyond a few cores. Many decision-support applications, however, require solving large collections of MIP instances. This talk reports on computational experiments with leading MIP solvers for managing such workloads on modern multi-core CPUs, offering practical guidance on thread allocation, degrees of job-level parallelism, and solver configurations to improve throughput and energy efficiency.
Version
Published version
Access right on openHSU
Open access